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Description
Table 1-5 ? Digital Output Pinout
Name
DOUT[0]
DOUT[1]
DOUT[2]
DOUT[3]
DOUT[4]
DOUT[5]
DOUT[6]
DOUT[7]
DOUT[8]
DOUT[9]
DOUT[10]
DOUT[11]
DOUT[12]
DOUT[13]
DOUT[14]
DOUT[15]
Pin
B3
B5
B11
E11
A10
D10
G10
B9
D9
F9
G9
D8
A7
D7
B6
D6
Description
P8051 legacy header (J31) pin 2
P8051 legacy header (J31) pin 4
P8051 legacy header (J31) pin 8
P8051 legacy header (J31) pin 10
P8051 legacy header (J31) pin 12
P8051 legacy header (J31) pin 14
P8051 legacy header (J31) pin 18
P8051 legacy header (J31) pin 20
P8051 legacy header (J31) pin 22
P8051 legacy header (J31) pin 24
P8051 legacy header (J31) pin 26
P8051 legacy header (J31) pin 30
P8051 legacy header (J31) pin 32
P8051 legacy header (J31) pin 34
P8051 legacy header (J31) pin 36
P8051 legacy header (J31) pin 38
Table 1-6 ? Enable Output Pinout
Name
POWER_ENABLE[0]
POWER_ENABLE[1]
POWER_ENABLE[2]
POWER_ENABLE[3]
POWER_ENABLE[4]
POWER_ENABLE[5]
POWER_ENABLE[6]
POWER_ENABLE[7]
POWER_ENABLE[8]
POWER_ENABLE[9]
POWER_ENABLE[10]
POWER_ENABLE[11]
POWER_ENABLE[12]
POWER_ENABLE[13]
POWER_ENABLE[14]
POWER_ENABLE[15]
Pin
T1
P7
R6
R5
U21
U22
T22
T16
R17
T17
R18
R19
T19
T20
R21
C6
v2.0
Description
On-board 5 V switching regulator enable (REG3_EN)
On-board 5 V LDO regulator enable (REG4_EN)
On-board 3.3 V switching regulator enable (REG1_EN)
On-board 1.5 V switching regulator enable (REG2_EN)
Mixed signal header (J10) pin 27
Mixed signal header (J10) pin 29
Mixed signal header (J10) pin 31
Mixed signal header (J10) pin 80
Mixed signal header (J10) pin 22
Mixed signal header (J10) pin 24
Mixed signal header (J10) pin 26
Mixed signal header (J10) pin 30
Mixed signal header (J10) pin 32
Mixed signal header (J10) pin 34
Mixed signal header (J10) pin 36
P8051 legacy header (J31) pin 37
5
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